姓　名：杨依忠
	职　称：副教授
	所属系：集成电路系
	邮　箱：yangyizhong@hfut.edu.cn

个人简介：

杨依忠，博士，硕士生导师。主持和参与省重大科技专项及省科技攻关等项目及企业委托项目等近10项，获得安徽省教学成果一等奖和三等奖各一次。现主要从事集成电路相关领域研究与设计，主要包括视频编解码，显示驱动以及高速接口转换等芯片研发与设计，图像分割、修复及增强处理与实现等。发表学术论文30余篇。申请国家发明专利十多项，已授权10项。担任IET Computer Vision, IET Image Processing, Visual Computer, Multimedia Systems等期刊审稿人。

研究方向：

1.集成电路设计（视频编解码、显示驱动等）

2.计算机视觉技术（图像分割、修复及增强等）

开设课程（本科生、研究生）：

本科生课程《超大规模集成电路设计及EDA技术》、《FPGA综合实践》

研究生课程《现代EDA工具与应用》

科研项目：

主持和参与省重大科技专项及省科技攻关等项目及企业委托项目等近10项

代表成果（著作、论文、专利等，限10项）：

1. Yizhong Yang, Jiahao, Ruan, Yongqiang, Zhang; Xin, Cheng; Zhang; Guangjun, Xie. STPNet: A Spatial-Temporal Propagation Network for Background Subtraction, IEEE Transactions on Circuits and Systems for Video Technology, 2022, 32(04): 2145-2157.

2. Yizhong Yang,Cheng, Zhihang, Yu, Haotian; Zhang, Yongqiang; Cheng, Xin; Zhang, Zhang, Xie, Guangjun ; MSE-Net: generative image inpainting with multi-scale encoder, Visual Computer, 2022, 38: 2647-2659.

3. Yizhong Yang, Tao Zhang, Jinzhao Hu, Dong Xu, Guangjun Xie*. End-to-end Background Subtraction via a Multi-scale Spatio-temporal Model. IEEE Access 2019, 7: 97949-97958.

4. Yizhong Yang, Dong Xu, Shen Rong, Guangjun Xie, Feng Chen. An Efficient Stereo Matching Algorithm Based on Four-Moded Census Transform for High-Resolution Images. 3D Research 2018, 9: 33.

5. Yizhong Yang, Qiang Zhang, Pengfei Wang, Xionglou Hu, Nengju Wu. Moving Object Detection for Dynamic Background Scenes Based on Spatiotemporal Model. Advances in Multimedia 2017:5179013.

6. Yizhong Yang, Xionglou Hu, Nengju Wu, Pengfei Wang, Dong Xu, Shen Rong. A Depth Map Ge neration Algorithm Based on Saliency Detection for 2D to 3D Conversion. 3D Research 2017, 8: 29.

7.杨依忠,汪鹏飞,胡雄楼,伍能举.基于鲁棒主成分分析的运动目标检测优化算法.电子与信息学报. 2018, 40(6): 1309-1315.

8. Du Longjie, Yang Yizhong, Chen Yang, Xie Guangjun, Cheng Xin. An ultra-low quiescent current CMOS low-dropout regulator with small output voltage variations [J]. Journal of Power and Energy Engineering, 2014, 2:477-482.

9. Chen Yang, Yang Yizhong, Du Longjie, Xie Guangjun, Cheng Xin，Yi Maoxiang. An Ultra-low Quiescent Current Output Capacitor-less Low-Dropout Regulator with a Novel Slew-rate-enhanced Circuit[C]. 2014 IEEE International Symposium on Radio- Frequency Integration Technology, 1-3, 2014.

10. Xin Cheng, Yu Zhang, Guangjun Xie，Yizhong Yang andZhang Zhang，An Ultra-low Power Output Capacitor-less Low-dropout Regulator with Slew-rate-enhanced Circuit，Journal of Semiconductors [J]，2018, 39(3): 035002-1-6.

获奖荣誉：

获得安徽省教学成果一等奖和三等奖各一项。